Transient Analysis and Low Power Consumption of Oscillator using C-mos Technology at 90 nm

Authors

  • Nikhat Akhtar Research Scholar (Department of Physics & Electronics), Dr. Rammanohar Lohia Avadh University, Ayodhya, Uttar Pradesh, India Author
  • Vaibhav Research Scholar (Department of Physics & Electronics), Dr. Rammanohar Lohia Avadh University, Ayodhya, Uttar Pradesh, India Author
  • R.K. Tiwari Professor (Department of Physics & Electronics) Dr. Rammanohar Lohia Avadh University, Ayodhya, Uttar Pradesh, India Author

Keywords:

CMOS, oscillator, power consumption, voltage gain, noise analysis

Abstract

The design and analysis of an oscillator in 90 nm technology using the cadence virtuoso tool. This oscillator has less noise and power consumption. There is also evidence of oscillator periodic steady state response. The portable power supplies, such as solar cells or other devices, it is crucial that electronic devices and circuits that can work at low voltages for portable electronic applications.

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Published

2023-06-30

Issue

Vol. 2 No. 6 (2023): June 2023

Section

Articles

License

Copyright (c) 2023 International Journal of Scientific Research in Modern Science and Technology

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.

How to Cite

Transient Analysis and Low Power Consumption of Oscillator using C-mos Technology at 90 nm. (2023). International Journal of Scientific Research in Modern Science and Technology, 2(6), 87-90. https://ijsrmst.com/index.php/ijsrmst/article/view/123